The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2019

Filed:

Jun. 23, 2016
Applicant:

Innolux Corporation, Miao-Li County, TW;

Inventors:

Wen-Tsai Hsu, Miao-Li County, TW;

Wei-Kuang Lien, Miao-Li County, TW;

Assignee:

INNOLUX CORPORATION, Miao-Li County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/045 (2006.01); G06F 3/041 (2006.01); G09G 3/36 (2006.01); G06F 3/044 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0412 (2013.01); G06F 3/0416 (2013.01); G09G 3/3677 (2013.01); G06F 3/044 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/021 (2013.01); G09G 2310/0216 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0283 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G11C 19/28 (2013.01);
Abstract

A gate driving circuit includes a plurality of shift registers arranged to output the gate driving signals in sequence. The shift registers are divided into groups arranged in sequence, wherein the driving signal from a first one of a N+1group of shift registers is next to the driving signal from a first one of a Ngroup of shift registers; and at least one first compensation circuit connected to the last one of the Ngroup of shift registers and the first one of the N+1group of shift registers, wherein the first compensation circuit provides a first control signal to enable the last one of the Ngroup of shift registers to perform signal holding, and provides a second control signal to enable the first one of the N+1group of shift registers to perform pre-charging, wherein N is an integer greater than zero.


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