The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2019

Filed:

Apr. 28, 2017
Applicant:

Linear Technology Corporation, Milpitas, CA (US);

Inventors:

Michael Paul, Santa Barbara, CA (US);

David M. Stover, Santa Barbara, CA (US);

Heath D. Stewart, Santa Barbara, CA (US);

Jeffrey L. Heath, Santa Barbara, CA (US);

Assignee:

Linear Technology Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/10 (2006.01); G06F 1/26 (2006.01); H04L 12/40 (2006.01);
U.S. Cl.
CPC ...
H04L 12/10 (2013.01); G06F 1/26 (2013.01); H04L 12/40045 (2013.01);
Abstract

The invention pertains to systems where DC power is supplied by a PSE to a PD, such as over differential data wire pairs. IEEE standards require a minimum current to be drawn from the PD in order for the PSE to continue supplying the DC voltage. If the PD is in a low power mode, the PSE will normally discontinue supplying the DC voltage, which then requires a new detection and classification routine for powering up again. To avoid this, a 'maintain power signature' controller provides a periodic current pulse by a current source connected between the PD input and the PD's full bridge rectifier. Any droop in the DC voltage that reverse biases the full bridge rectifier while the PD is in its low power mode will not affect the current pulse, so the PSE continues to supply the DC voltage.


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