The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2019

Filed:

Jan. 31, 2018
Applicant:

The United States of America As Represented BY the Secretary of the Navy, Washington, DC (US);

Inventors:

Osama Nayfeh, San Diego, CA (US);

Anna Leese De Escobar, San Diego, CA (US);

Brad Liu, San Diego, CA (US);

Patrick Sims, San Diego, CA (US);

Sam Carter, Waldorf, MD (US);

David Kurt Gaskill, Alexandria, VA (US);

Tom Reinecke, Alexandria, VA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/027 (2006.01); H01L 21/768 (2006.01); H01L 21/04 (2006.01); H01L 21/02 (2006.01); H01L 23/532 (2006.01); C23C 16/32 (2006.01); C30B 25/10 (2006.01); C30B 29/36 (2006.01); G02F 1/00 (2006.01); G06N 10/00 (2019.01);
U.S. Cl.
CPC ...
H01L 21/31144 (2013.01); C23C 16/325 (2013.01); C30B 25/105 (2013.01); C30B 29/36 (2013.01); G02F 1/0054 (2013.01); G06N 10/00 (2019.01); H01L 21/0276 (2013.01); H01L 21/02447 (2013.01); H01L 21/02529 (2013.01); H01L 21/049 (2013.01); H01L 21/76826 (2013.01); H01L 23/5329 (2013.01);
Abstract

A method includes depositing a layer of silicon oxide onto a layer of silicon carbide; ion implanting the layer of silicon carbide, annealing the ion implanted layer of silicon carbide to produce defects within the layer of silicon carbide, performing photolithography using a mask layer on regions of the layer of silicon carbide to define regions for electrode deposition, removing the layer of silicon oxide from the layer of silicon carbide in the one or more regions for electrode deposition, forming one or more electrodes by depositing indium tin oxide (ITO) in each of the regions for electrode deposition, performing a first lift-off operation to remove the mask layer surrounding the electrodes, depositing a passivation and gate silicon oxide layer on top of the layer of silicon carbide and the electrodes, and performing a second lift-off operation to fabricate an optically transparent ITO gate between the electrodes.


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