The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2019

Filed:

Jun. 17, 2014
Applicant:

Nec Corporation, Tokyo, JP;

Inventors:

Ryusuke Nebashi, Tokyo, JP;

Noboru Sakimura, Tokyo, JP;

Tadahiko Sugibayashi, Tokyo, JP;

Assignee:

NEC CORPORATION, Minato-ku, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/02 (2006.01); G11C 15/04 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 15/02 (2013.01); G11C 11/1657 (2013.01); G11C 11/1659 (2013.01); G11C 11/1675 (2013.01); G11C 15/046 (2013.01);
Abstract

In order to provide a technique for reducing an area of a content addressable memory cell and suppressing a leak current in a content addressable memory which calculates similarity, a content addressable memory cell of the present invention, comprising: a resistance network which includes plural current paths, a logic circuit for selecting a current path in response to input data, and a variable-resistance-type non-volatile memory element that is arranged on at least one current path and stores data and whose resistance value is changed according to a result of logical calculation based on the input data and the stored data; and a charge/discharge circuit which is connected with the resistance network and a match line and whose delay time from inputting a signal through the match line until outputting the signal is changed according to the result of logical calculation based on the input data and the stored data.


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