The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2019
Filed:
Apr. 24, 2017
Applicant:
Exten Technologies, Inc., Austin, TX (US);
Inventors:
Harish Kumar Shakamuri, Austin, TX (US);
Ashwin Kamath, Cedar Park, TX (US);
Michael Enz, Fargo, ND (US);
Assignee:
EXTEN Technologies, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 13/36 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G06F 13/36 (2013.01); G06F 13/4022 (2013.01); G06F 13/4265 (2013.01); G06F 2213/0026 (2013.01);
Abstract
The present subject disclosure provides a PCIe switch architecture with data and control path systolic array that can be used for real time data analysis or Artificial Intelligence (AI) learning. A systolic array is described which analyzes the TLPs received by an uplink port and processes the TLPs according to pre-programmed rules. Then the TLP is forwarded to a destination port. The reverse operation is described as well.