The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Jan. 08, 2018
Applicant:

Novatek Microelectronics Corp., Hsinchu, TW;

Inventors:

Chang-Cheng Huang, Taichung, TW;

Shen-Iuan Liu, Taipei, TW;

Ju-Lin Huang, Hsinchu County, TW;

Tzu-Chien Tzeng, Hsinchu, TW;

Keko-Chun Liang, Hsinchu, TW;

Yu-Hsiang Wang, Hsinchu, TW;

Che-Wei Yeh, New Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H03L 7/08 (2006.01); H03L 7/091 (2006.01); H03L 7/093 (2006.01); H03L 7/089 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0016 (2013.01); H03L 7/0807 (2013.01); H03L 7/0891 (2013.01); H03L 7/091 (2013.01); H03L 7/093 (2013.01);
Abstract

A clock and data recovery circuit with jitter tolerance enhancement is provided. The CDR circuit includes: a bang-bang phase detector, a digital filter, a digitally controlled oscillator, and an adaptive loop gain control circuit. The CDR circuit detects a loop bandwidth variation and adjusts the loop bandwidth of CDR circuit by adjusting proportional path and integral path gain factors of the digital filter of the CDR circuit. The loop gain controller uses two methods to adjust the loop gain in CDR circuit: bang-bang adjusting method and linear adjusting method.


Find Patent Forward Citations

Loading…