The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Jun. 03, 2015
Applicant:

Luxtera, Inc., Carlsbad, CA (US);

Inventors:

Attila Mekis, Carlsbad, CA (US);

Peter DeDobbelaere, San Diego, CA (US);

Kosei Yokoyama, San Diego, CA (US);

Sherif Abdalla, Carlsbad, CA (US);

Steffen Gloeckner, San Diego, CA (US);

John Guckenberger, San Diego, CA (US);

Thierry Pinguet, Arlington, WA (US);

Gianlorenzo Masini, Carlsbad, CA (US);

Daniel Kucharski, San Marcos, CA (US);

Assignee:

Luxtera, Inc., Carlsbad, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 10/2575 (2013.01); H04B 10/40 (2013.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 27/06 (2006.01); H01L 25/16 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H04B 10/2575 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H04B 10/40 (2013.01); H01L 25/0652 (2013.01); H01L 25/167 (2013.01); H01L 27/0688 (2013.01); H01L 2225/06541 (2013.01);
Abstract

Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include in an optoelectronic transceiver comprising photonic and electronic devices from two complementary metal-oxide semiconductor (CMOS) die with different silicon layer thicknesses for the photonic and electronic devices, the CMOS die bonded together by metal contacts: communicating optical signals and electronic signals to and from said optoelectronic transceiver utilizing a received continuous wave optical signal as a source signal. A first of the CMOS die includes the photonic devices and a second includes the electronic devices. Electrical signals may be communicated between electrical devices to the optical devices utilizing through-silicon vias coupled to the metal contacts. The metal contacts may include back-end metals from a CMOS process. The electronic and photonic devices may be fabricated on SOI wafers, with the SOI wafers being diced to form the CMOS die.


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