The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2019
Filed:
Mar. 03, 2017
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Shih-Chieh Hsin, San Diego, CA (US);
Med Nariman, Ladera Ranch, CA (US);
Jingcheng Zhuang, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/3562 (2006.01); H03K 19/0185 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 3/35625 (2013.01); H03K 3/35613 (2013.01); H03K 3/356182 (2013.01); H03K 19/018521 (2013.01);
Abstract
A master-slave level shifter array includes an asymmetric master level shifter having a predefined output state that produces an enable signal to drive an array of symmetric slave level shifters during a power collapse. As a result, the slave level shifter array has a reliable output state during a power collapse, while also providing wafer area savings due to their small symmetric characteristics.