The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Aug. 28, 2017
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Toshiki Seshita, Kawasaki Kanagawa, JP;

Yasuhiko Kuriyama, Yokohama Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/52 (2006.01); H01L 27/12 (2006.01); H01L 27/02 (2006.01); H03F 1/22 (2006.01); H03F 1/02 (2006.01); H03F 3/195 (2006.01);
U.S. Cl.
CPC ...
H03F 1/523 (2013.01); H01L 27/0255 (2013.01); H01L 27/1203 (2013.01); H03F 1/0205 (2013.01); H03F 1/223 (2013.01); H03F 3/195 (2013.01); H03F 2200/231 (2013.01); H03F 2200/294 (2013.01); H03F 2200/414 (2013.01); H03F 2200/444 (2013.01); H03F 2200/451 (2013.01);
Abstract

A semiconductor device formed on a silicon on insulator substrate includes an input node to receive a first signal, such as a high frequency signal, and an output node to output a second signal corresponding to the first signal. A first transistor has a gate that receives the first signal from the input node and thereby outputs an amplified first signal. A second transistor is connected between a drain of the first transistor and the output node. An inductor is connected between a source of the first transistor and a ground potential. A capacitor connected is between the gate of the first transistor and the input node. An electrostatic discharge (ESD) protective element is connected between a first node and a second node. The first node is between the inductor and the first transistor, and the second node is between the input node and the capacitor.


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