The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Oct. 01, 2015
Applicant:

Sharp Kabushiki Kaisha, Sakai, Osaka, JP;

Inventors:

Takao Saitoh, Sakai, JP;

Yohsuke Kanzaki, Sakai, JP;

Yutaka Takamaru, Sakai, JP;

Keisuke Ide, Sakai, JP;

Seiji Kaneko, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 27/12 (2006.01); C23C 16/42 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); C23C 16/42 (2013.01); H01L 27/1225 (2013.01); H01L 29/786 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01);
Abstract

In a semiconductor device including a semiconductor layer made of an oxide semiconductor, occurrence of variance in the characteristics of TFTs is suppressed. In a manufacturing process of a semiconductor device () where a passivation film () is to be formed at an upper layer of a semiconductor layer () made of an oxide semiconductor, deposition conditions of the passivation film () are set such that the proportion of pure metal (the ratio of pure metal to all the components of the semiconductor layer ()) at an interface of the semiconductor layer () to the passivation film () becomes higher than the proportion of pure metal in the bulk of the semiconductor layer ().


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