The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2019
Filed:
Oct. 17, 2017
Applicant:
Renesas Electronics Corporation, Tokyo, JP;
Inventor:
Tatsuya Usami, Ibaraki, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/768 (2006.01); H01L 21/762 (2006.01); H01L 21/764 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 21/74 (2006.01); H01L 29/06 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 21/762 (2013.01); H01L 21/743 (2013.01); H01L 21/764 (2013.01); H01L 21/8234 (2013.01); H01L 21/823871 (2013.01); H01L 27/092 (2013.01); H01L 21/28518 (2013.01); H01L 21/823878 (2013.01); H01L 21/823892 (2013.01); H01L 29/0649 (2013.01);
Abstract
To provide a semiconductor device having a substrate contact in a deep trench thereof and having an improved characteristic. A PVD-metal film (metal film formed by PVD) is used as a first barrier metal film which is a lowermost layer barrier metal film formed in a deep trench penetrating an n type epitaxial layer and a reaching a layer therebelow. Such a configuration makes it possible to stably form a metal silicide layer at a boundary between the PVD-metal film and a silicon layer therebelow (or silicon substrate) and thereby stabilize the contact resistance.