The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Mar. 07, 2018
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Kotaro Sakumura, Tokyo, JP;

Yasutaka Horikoshi, Tokyo, JP;

Hiroshi Tachibana, Tokyo, JP;

Keita Kashima, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/28 (2006.01); H01L 21/822 (2006.01); H01L 23/50 (2006.01); G11C 16/30 (2006.01); G11C 5/14 (2006.01); G11C 11/56 (2006.01); H01L 27/04 (2006.01);
U.S. Cl.
CPC ...
G11C 19/28 (2013.01); G11C 5/14 (2013.01); G11C 11/5628 (2013.01); G11C 11/5642 (2013.01); G11C 16/30 (2013.01); H01L 21/822 (2013.01); H01L 23/50 (2013.01); H01L 27/04 (2013.01);
Abstract

A malfunction caused by sharp fluctuations in current is prevented while suppressing an increase in circuit size. A semiconductor device includes a plurality of modules. The semiconductor device includes: a table that stores a plurality of operating frequencies in each of the modules and a plurality of scores determined based on the operating frequencies such that the operating frequencies and the scores are associated with each other for each of the modules; a score specifying unit that acquires the clock operating frequencies of the modules and specifies the scores based on the clock operating frequencies with reference to the table; and an output unit that outputs an instruction to activate the modules at different times if the specified scores exceed a predetermined threshold value.


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