The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Apr. 05, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Kyung Min Lee, Seoul, KR;

Hyemin Shin, Suwon-si, KR;

Jung Hyuk Lee, Hwaseong-si, KR;

Hyunsung Jung, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/16 (2006.01); H01L 23/528 (2006.01); H01L 27/22 (2006.01); H01L 43/08 (2006.01); G11C 29/42 (2006.01); H01F 10/32 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1673 (2013.01); G11C 11/161 (2013.01); G11C 11/1655 (2013.01); G11C 11/1675 (2013.01); G11C 11/1697 (2013.01); G11C 29/42 (2013.01); H01F 10/329 (2013.01); H01F 10/3254 (2013.01); H01L 23/528 (2013.01); H01L 27/228 (2013.01); H01L 43/08 (2013.01);
Abstract

A memory device may include a selected bit line connected to a first node and configured to receive a first current, a selected memory cell connected to the selected bit line, a reference bit line connected to a second node and configured to receive a second current, a reference memory cell connected between the reference bit line and a reference source line, a sub bit line connected to the second node, a sub memory cell connected between the sub bit line and a sub source line, and a sense amplifier configured to sense a voltage difference between the first node and the second node to determine data read from a selected memory cell connected to the selected bit line. The sub memory cell may include a cell transistor. A gate electrode of the cell transistor may be connected to the sub source line.


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