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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10255533 B1

PDFFull Text
Date of Patent:
Apr. 09, 2019

Filed:

Feb. 02, 2015

Information device, computer-readable storage medium for computer program, and method for sharing memory

Applicant:

Konica Minolta, Inc., Tokyo, JP;

Inventors:

Takashi Oikawa, Aichi, JP;

Tomoyuki Atsumi, Aichi, JP;

Takanobu Sugiyama, Toyokawa, JP;

Tatsuya Kitaguchi, Toyokawa, JP;

Assignee:

Konica Minolta, Inc., Tokyo, JP;

Attorney:

Osha Liang LLP

Primary Examiner:

Kent Yip

Int. Cl.
CPC ...
G06K 15/00 (2006.01); G06F 3/12 (2006.01); G06K 15/02 (2006.01); H04N 1/32 (2006.01);
U.S. Cl.
CPC ...
G06K 15/401 (2013.01); G06F 3/1215 (2013.01); G06F 3/1229 (2013.01); G06F 3/1237 (2013.01); G06F 3/1248 (2013.01); G06F 3/1298 (2013.01); G06K 15/1806 (2013.01); G06K 15/1836 (2013.01); G06K 15/1848 (2013.01); G06K 15/1857 (2013.01); H04N 1/32448 (2013.01); H04N 1/32593 (2013.01); H04N 2201/0094 (2013.01);
Abstract

A device includes a first processing portion configured to keep a memory region to perform a first process; a second processing portion configured to perform any one of a plurality of second processes by using a memory region provided by the first processing portion; and a predicting portion configured to predict a first size of a first memory region to be required next to a second memory region which is required at present by the second processing portion. The second processing portion requests, from the first processing portion, a memory region having at least a larger size of the first size and a second size of the second memory region. In response to the request, the first processing portion provides the second processing portion with a memory region which is a part of the memory region kept and is of a size requested by the second processing portion.

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