The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

May. 23, 2017
Applicant:

Regal Beloit America, Inc., Beloit, WI (US);

Inventors:

Ming Li, Fort Wayne, IN (US);

Roger Carlos Becerra, Fort Wayne, IN (US);

Assignee:

Regal Beloit America, Inc., Beloit, WI (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02P 27/06 (2006.01); H02K 11/33 (2016.01); H02K 11/40 (2016.01); H02K 5/22 (2006.01); H02K 15/00 (2006.01); H02M 1/084 (2006.01); H02M 5/458 (2006.01);
U.S. Cl.
CPC ...
H02P 27/06 (2013.01); H02K 5/225 (2013.01); H02K 11/33 (2016.01); H02K 11/40 (2016.01); H02K 15/00 (2013.01); H02M 1/084 (2013.01); H02M 5/458 (2013.01);
Abstract

A ground assembly includes a first layer, a second layer, and a bypass capacitor. The first layer includes a power ground, a communication ground spaced from the power ground, a conductive path defining a parasitic inductance and electrically coupled between the power ground and the communication ground, and an electrically insulating layer. At least a portion of the insulating layer is positioned between the power and communication grounds. The second layer includes a first substrate that is spaced from the power ground to define a first parasitic capacitance therebetween and is spaced from the communication ground to define a second parasitic capacitance therebetween. The bypass capacitor is electrically coupled between the power ground and the first substrate.


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