The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Dec. 15, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Jeffrey S. Lille, Sunnyvale, CA (US);

Timothy J. Minvielle, San Jose, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/00 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); H01L 45/06 (2013.01); H01L 45/1226 (2013.01); H01L 45/1246 (2013.01); H01L 45/1683 (2013.01); H01L 27/2436 (2013.01); H01L 45/1253 (2013.01); H01L 45/144 (2013.01);
Abstract

A phase change memory device containing a phase change memory material layer includes a vertically repeating sequence of unit layer stacks located over a substrate, a plurality of openings vertically extending through the vertically repeating sequence, a plurality of vertical bit lines located within a respective one of the plurality of openings, and vertical stacks of insulating spacers. Each of the unit layer stacks includes an insulating layer, at least one of the phase change memory material layer or a threshold switch material layer, and an electrically conductive word line layer. Each of the insulating spacers laterally surrounds a respective one of the plurality of vertical bit lines, and contacts a sidewall of a respective one of the electrically conductive word line layers.


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