The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Nov. 30, 2017
Applicant:

SK Hynix Inc., Icheon, KR;

Inventors:

Jong Chul Lee, Seoul, KR;

Jongho Lee, Icheon, KR;

Assignee:

SK HYNIX INC., Icheon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/22 (2006.01); H01L 27/24 (2006.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); H01L 43/12 (2006.01); H01L 45/00 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2463 (2013.01); H01L 23/528 (2013.01); H01L 27/224 (2013.01); H01L 27/2409 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01); H01L 45/04 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/142 (2013.01); H01L 45/143 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); H01L 45/165 (2013.01); H01L 45/1608 (2013.01); H01L 45/1675 (2013.01);
Abstract

A method of manufacturing a cross-point memory array device is disclosed. In the method, a substrate is provided. A plurality of first conductive line patterns are formed over the substrate. An insulating layer is formed over the first conductive line patterns. The insulating layer includes an insulative oxide. A plurality of switching film patterns are formed on the first conductive line patterns by selectively doping a plurality regions of the insulating layer. A plurality of memory structures are formed on the plurality of switching film patterns, respectively. A plurality of second conductive line patterns are formed on the plurality of memory structures.


Find Patent Forward Citations

Lee, Jong. (2019). Cross-point memory array device and method of manufacturing the same (U.S. Patent No. 10249681). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10249681

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…