The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Feb. 22, 2018
Applicant:

Mie Fujitsu Semiconductor Limited, Kuwana-shi, Mie, JP;

Inventors:

Satoshi Torii, Kuwana, JP;

Hideaki Matsumura, Kuwana, JP;

Shu Ishihara, Kuwana, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 27/11573 (2017.01); H01L 27/1157 (2017.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/311 (2006.01); H01L 21/225 (2006.01); H01L 21/28 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11573 (2013.01); H01L 27/1157 (2013.01); H01L 21/02164 (2013.01); H01L 21/02238 (2013.01); H01L 21/02255 (2013.01); H01L 21/2253 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/26586 (2013.01); H01L 21/28194 (2013.01); H01L 21/28202 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01);
Abstract

A manufacturing method of a semiconductor device includes: forming a tunnel oxide layer and a charge-storage layer in a region of a flash memory transistor; forming a first oxide film; removing the first oxide film in regions of a first transistor and a second transistor; forming a third oxide film by adding a first oxide layer between a first oxide film and a semiconductor substrate in a region of a third transistor while forming a second oxide film in the regions of the first transistor and the second transistor by oxidation; removing the second oxide film in the region of the first transistor; and forming a fifth oxide film by adding a second oxide layer between the second oxide film and the semiconductor substrate in the region of the second transistor while forming a fourth oxide film in the region of the first transistor by oxidation, and forming a sixth oxide film by adding a third oxide layer between the first oxide layer and the semiconductor substrate in the region of the third transistor.


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