The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Jul. 20, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Kuchanuri Subhash, Hwaseong-si, KR;

Rastogi Sidharth, Hwaseong-si, KR;

Deepak Sharma, Suwon-si, KR;

Chul-hong Park, Seongnam-si, KR;

Jae-seok Yang, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 23/528 (2006.01); H01L 27/118 (2006.01); H01L 27/11 (2006.01); H01L 27/105 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 23/5283 (2013.01); H01L 27/105 (2013.01); H01L 27/1116 (2013.01); H01L 27/11807 (2013.01); H01L 27/1104 (2013.01); H01L 2027/11875 (2013.01); H01L 2027/11883 (2013.01); H03K 19/00 (2013.01);
Abstract

An integrated circuit (IC) device includes at least one standard cell. The at least one standard cell includes: first and second active regions respectively disposed on each of two sides of a dummy region, the first and second active regions having different conductivity types and extending in a first direction; first and second gate lines extending parallel to each other in a second direction perpendicular to the first direction across the first and second active regions, a first detour interconnection structure configured to electrically connect the first gate line with the second gate line; and a second detour interconnection structure configured to electrically connect the second gate line with the first gate line. The first and second detour interconnection structures include a lower interconnection layer extending in the first direction, an upper interconnection layer extending in the second direction, and a contact via.


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