The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Jun. 22, 2015
Applicant:

Agency for Science, Technology and Research, Singapore, SG;

Inventors:

Sunil Wickramanayaka, Singapore, SG;

Ling Xie, Singapore, SG;

Jerry Jie Li Aw, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11464 (2013.01); H01L 2224/13026 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13562 (2013.01); H01L 2224/13611 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/81 (2013.01); H01L 2224/81022 (2013.01); H01L 2224/8181 (2013.01); H01L 2224/8182 (2013.01); H01L 2224/81099 (2013.01); H01L 2225/06513 (2013.01);
Abstract

A method for chip on wafer bonding is provided. The method includes the formation of a plurality of posts on at least one of a chip and a wafer, and a like plurality of contacts on the other of the chip and the wafer. After formation, a contact surface of each post is planarized, the respective planarized contact surface having a surface roughness height. A bonding material is then applied to at least one of the chip in a thickness no greater than the surface roughness height of the contact surface. The posts are then temporarily bonded to the contacts using the bonding material to stabilize a position of the chip relative to the wafer for permanent diffusion bonding of the chip to the wafer.


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