The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Jan. 08, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jian Jun Kong, Changdu, CN;

She Yu Tang, Chengdu, CN;

Tian Yi Zhang, Chengdu, CN;

Qin Xu Yu, Chengdu, CN;

Sheng Pin Yang, Chengdu, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/304 (2006.01); H01L 21/311 (2006.01); H01L 21/683 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 21/304 (2013.01); H01L 21/31111 (2013.01); H01L 21/32134 (2013.01); H01L 21/6836 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01);
Abstract

In some embodiments, a method includes wet-etching a first film layer of a plurality of film layers stacked on a semiconductor substrate, the wet-etching of the first film layer performed using a first chemical, where the first film layer is an outermost film layer stacked on the semiconductor substrate. The method further includes wet-etching a second film layer of the plurality of film layers using a second chemical. The method also includes using a mechanical grinding wheel to grind the semiconductor substrate to reduce a thickness of the semiconductor substrate.


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