logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10248534 B1

PDFFull Text
Expired
Date of Patent:
Apr. 02, 2019

Filed:

Nov. 29, 2016

Template-based methodology for validating hardware features

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Purushotam Bheemanna, Bangalore, IN;

Niraj K. Pandey, Noida, IN;

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorney:

David B. Woycechowsky

Primary Examiner:

Charles M Swift

Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06F 11/34 (2006.01); G06F 9/46 (2006.01); G06F 11/263 (2006.01); G06F 11/30 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 11/36 (2013.01); G06F 9/48 (2013.01); G06F 9/485 (2013.01); G06F 9/4843 (2013.01); G06F 11/263 (2013.01); G06F 11/3003 (2013.01); G06F 11/3024 (2013.01); G06F 11/34 (2013.01); G06F 11/3447 (2013.01); G06F 11/3466 (2013.01); G06F 11/3668 (2013.01); G06F 11/3672 (2013.01); G06F 11/3676 (2013.01); G06F 11/3696 (2013.01);
Abstract

In one embodiment of the present invention, a thread is scheduled for execution by a processor, and the thread includes instructions for testing functionality of a feature of the processor. A workload location on the thread is determined. A hook is placed on the determined workload location. The thread is executed by the processor. In response to encountering the hook during the execution of the thread, a workload is selected from a pool, and the pool includes two or more workloads.

Find Patent Forward Citations

Bheemanna, Purushotam. (2019). Template-based methodology for validating hardware features (U.S. Patent No. 10248534). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10248534

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…