The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Aug. 02, 2017
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Neil John Simpson, Rockwall, TX (US);

Alan David Hales, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3187 (2006.01); G01R 31/3183 (2006.01); G01R 31/317 (2006.01); G11C 29/12 (2006.01); G11C 29/36 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3187 (2013.01); G01R 31/3183 (2013.01); G01R 31/31724 (2013.01); G01R 31/318335 (2013.01); G01R 31/318385 (2013.01); G11C 29/12 (2013.01); G11C 2029/3602 (2013.01);
Abstract

The PRPG provides the test stimulus to the circuit, but it can only generate a finite number of care-bits from any given input seed which limits the maximum coverage that can be achieved. The only way to increase the coverage is to provide additional seed input data to the PRPG. The on-chip one time only programmable eFuse is used to store new PRPG seed data inputs and corresponding MISR output signature data for comparison. An XOR circuit option on the output of the MISR is operable to further compress the output data.


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