The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2019
Filed:
Jan. 30, 2017
Arm Limited, Cambridge, GB;
Péter Vári, Budapest, HU;
Péter Czakó, Pilisvorosvar, HU;
ARM Limited, Cambridge, GB;
Abstract
An apparatus and method are provided for filtering transactions performed between a master device and a slave device, where each transaction comprises one or more transfers. The apparatus has a first interface for coupling to the master device and a second interface for coupling to the slave device. Routing circuitry is used to route, between the first interface and the second interface, signals representing each transfer. Filtering decision generation circuitry is arranged to perform a combinatorial operation to generate a filtering decision dependent on current values of one or more received input variables. The routing circuitry is then responsive to the filtering decision indicating a block condition for a current transfer, to block the current transfer by preventing one or more of the signals representing that current transfer from being passed between the first interface and the second interface in either direction. The filtering decision generation circuitry is responsive to assertion of the current transfer within the apparatus to generate the filtering decision, and thereafter to maintain that filtering decision for a duration of time that the current transfer is asserted, irrespective of a change in the values of the input variables. Such an approach provides a high performance solution while also enabling certain bus protocol violation scenarios to be avoided.