The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2019
Filed:
Oct. 30, 2017
Renesas Electronics Corporation, Tokyo, JP;
Hiromichi Yamada, Tokyo, JP;
Akihiro Yamate, Tokyo, JP;
Hitoshi Suzuki, Tokyo, JP;
Yoichi Yuyama, Tokyo, JP;
Teppei Hirotsu, Tokyo, JP;
Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;
Abstract
In a system for performing clock generation for each semiconductor device, synchronization between the semiconductor devices is achieved without causing a count value in a counter to be discontinuously changed. A semiconductor deviceincludes a clock oscillator, a counterconfigured to count the number of clocks, a periodic registerin which a value corresponding to a period for synchronization is set, a comparison circuitconfigured to compare the count value in the counterwith the set value in the periodic register, a match flag registerin which a predetermined value is set when the count value coincides with the set value, a match output terminalconfigured to output the value in the match flag registerfrom the own semiconductor device, a match input terminalto which a value output from another semiconductor device to be synchronized is input, and a reset circuit configured to reset the counterand the match flag registerwhen both the value in the match flag registerof the own semiconductor device and the value input to the match input terminalbecome a predetermined value.