The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2019
Filed:
Jan. 04, 2017
Applicant:
Magnachip Semiconductor, Ltd., Cheongju-si, KR;
Inventors:
Assignee:
MagnaChip Semiconductor, Ltd., Cheongju-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 19/00 (2006.01); H03K 19/003 (2006.01); H03K 19/0948 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0013 (2013.01); H03K 19/00315 (2013.01); H03K 19/00323 (2013.01); H03K 19/0948 (2013.01);
Abstract
There is provided a CMOS inverter circuit device. The CMOS inverter circuit device includes a delay circuit unit configured to generate different charge and discharge paths of each gate node of a PMOS transistor and an NMOS transistor respectively at the time that an input signal transitions between high and low levels. Therefore, the present examples minimize or erase generation of a short circuit current made at the time that the input signal transition. The examples may simplify circuit architecture, and may make a magnitude of a CMOS inverter circuit device smaller.