The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2019

Filed:

Sep. 28, 2016
Applicant:

Psemi Corporation, San Diego, CA (US);

Inventors:

Jeffrey A. Dykstra, Woodstock, IL (US);

David Kovac, Arlington Heights, IL (US);

Assignee:

pSemi Corporation, San Diego, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03G 3/10 (2006.01); H03F 1/32 (2006.01); H03F 3/195 (2006.01); H03F 1/02 (2006.01); H03F 1/30 (2006.01); H03F 3/213 (2006.01); H03F 1/22 (2006.01); H03F 1/56 (2006.01); H03F 3/21 (2006.01); H03F 3/24 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3205 (2013.01); H03F 1/025 (2013.01); H03F 1/0227 (2013.01); H03F 1/0244 (2013.01); H03F 1/0277 (2013.01); H03F 1/223 (2013.01); H03F 1/301 (2013.01); H03F 1/3247 (2013.01); H03F 1/3282 (2013.01); H03F 1/56 (2013.01); H03F 3/195 (2013.01); H03F 3/211 (2013.01); H03F 3/213 (2013.01); H03F 3/24 (2013.01); H03F 3/45183 (2013.01); H03F 3/45188 (2013.01); H03F 2200/102 (2013.01); H03F 2200/108 (2013.01); H03F 2200/129 (2013.01); H03F 2200/15 (2013.01); H03F 2200/18 (2013.01); H03F 2200/222 (2013.01); H03F 2200/336 (2013.01); H03F 2200/387 (2013.01); H03F 2200/408 (2013.01); H03F 2200/411 (2013.01); H03F 2200/447 (2013.01); H03F 2200/451 (2013.01); H03F 2200/468 (2013.01); H03F 2200/534 (2013.01); H03F 2200/537 (2013.01); H03F 2200/541 (2013.01); H03F 2200/61 (2013.01); H03F 2200/78 (2013.01); H03F 2201/3215 (2013.01); H03F 2201/3233 (2013.01); H03F 2203/21127 (2013.01); H03F 2203/45366 (2013.01); H03F 2203/45544 (2013.01); H03F 2203/45638 (2013.01); H03F 2203/45731 (2013.01);
Abstract

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage that varies according to a control voltage. The control voltage can be related to a desired output power of the amplifier and/or to an envelope signal of an input signal to the amplifier. Particular biasing for selectively controlling the stacked transistors to operate in either a saturation region or a triode region is also presented. Benefits of such controlling, including increased linear response of an output power of the amplifier, are also discussed.


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