The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2019

Filed:

Aug. 04, 2014
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Hidetoshi Makimura, Tokyo, JP;

Kengo Nishimoto, Tokyo, JP;

Toru Fukasawa, Tokyo, JP;

Kazunori Takahashi, Tokyo, JP;

Kazuya Hojo, Tokyo, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/24 (2006.01); H01Q 1/32 (2006.01); H01Q 1/38 (2006.01); H01Q 1/42 (2006.01); H01Q 1/48 (2006.01); H01Q 7/00 (2006.01); G07C 9/00 (2006.01);
U.S. Cl.
CPC ...
H01Q 1/24 (2013.01); H01Q 1/3241 (2013.01); H01Q 1/38 (2013.01); H01Q 1/42 (2013.01); H01Q 1/48 (2013.01); H01Q 7/00 (2013.01); H01Q 7/005 (2013.01); G07C 2009/00753 (2013.01);
Abstract

The present invention is characterized by an antenna device including: a circuit board; a circuit pattern formed by a conductor on a surface of the circuit board; and a minute loop antenna mounted on the circuit board and formed in a loop shape by a conductor having two end portions, wherein the circuit pattern includes at least a feeder circuit configured to supply power to the minute loop antenna, and a ground, and the minute loop antenna is mounted on the circuit board such that: the conductor having the two end portions is connected at one end thereof to the feeder circuit and connected at another end thereof to the ground; a loop surface of the conductor having the two end portions is perpendicular to a plane on which the circuit pattern is formed; and a normal line passing through the loop surface does not pass through the circuit pattern.


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