Silicon photosensor array integrated circuit on [110]substrate with deep, anisotropically-etched, trench isolation

Abstract

A method for fabricating a photosensor array integrated circuit includes forming an isolation trench by a method comprising depositing a hard mask layer on a [110]-oriented single-crystal silicon substrate wafer, depositing, exposing, and developing a photoresist on the hard mask layer to define photoresist openings of locations for the trenches, dry plasma etching through the photoresist openings to form openings in the hard mask layer of locations for the trenches, and performing an anisotropic wet etch through the openings in the hard mask layer. In particular embodiments, the trenches are lined with P-type silicon, a silicon dioxide dielectric, and an additional oxide layer before being filled with tungsten.