The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2019

Filed:

Jun. 06, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Panjae Park, Seongnam-si, KR;

Sutae Kim, Seoul, KR;

Donghyun Kim, Hwaseong-si, KR;

Ha-Young Kim, Seoul, KR;

Jung-ho Do, Yongin-si, KR;

Sunyoung Park, Seoul, KR;

Sanghoon Baek, Seoul, KR;

Jaewan Choi, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 27/0207 (2013.01); H01L 21/823871 (2013.01);
Abstract

According to example embodiments, a semiconductor device and a method for manufacturing the same are provided, the semiconductor device includes a substrate including a PMOSFET region and an NMOSFET region, a first gate electrode and a second gate electrode on the PMOSFET region, a third gate electrode and a fourth gate electrode on the NMOSFET region, and a first contact and a second contact connected to the first gate electrode and the fourth gate electrode, respectively. The first to fourth gate cut electrodes define a gate cut region that passes between the first and third gate electrodes and between the second and fourth gate electrodes. A portion of each of the first and second contacts overlaps with the gate cut region when viewed from a plan view.


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