The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2019

Filed:

Jul. 31, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Daniel Tuers, Kapaa, HI (US);

Abhijeet Manohar, Bangalore, IN;

Jonathan Hsu, Newark, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/14 (2006.01); G06F 11/10 (2006.01); G11C 29/00 (2006.01); G11C 16/34 (2006.01); G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01); G11C 16/10 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0629 (2013.01); G06F 3/0623 (2013.01); G06F 3/0679 (2013.01); G06F 11/1004 (2013.01); G06F 11/1012 (2013.01); G06F 12/1408 (2013.01); G11C 16/3418 (2013.01); G11C 29/42 (2013.01); G11C 29/44 (2013.01); G11C 29/52 (2013.01); G11C 29/70 (2013.01); G11C 29/82 (2013.01); G06F 3/0619 (2013.01); G06F 2212/402 (2013.01); G11C 16/10 (2013.01); G11C 2029/0409 (2013.01);
Abstract

A controller of a non-volatile memory system may be configured to identify bits of data to be stored in memory elements of non-volatile memory that are identified as unreliable. The controller may be configured to bias at least some of these bits to a predetermined logic value at which the bits are likely to be read from the unreliable memory elements. The controller may do so using a biasing key that the controller generates based on identification of the bits. Subsequently, when the data is read, the controller may assign log likelihood ratio values for the bits to correspond to a percent likelihood of the bits being biased to the predetermined logic value. The bits may also be unbiased using the biasing key.


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