The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2019
Filed:
Oct. 04, 2016
Dialog Semiconductor (Uk) Limited, London, GB;
Olivier Girard, Munich, DE;
Daniele Giorgetti, Munich, DE;
Joao Paulo Trierveiler Martins, Graz, AT;
Philip Todd, Corsham, GB;
Dialog Semiconductor (UK) Limited, London, GB;
Abstract
A distributed power management system comprising at least two power management integrated circuits PMICs is presented. A master power management integrated circuit PMIC supplies power to a subsystem of an electronic device based on a current state of a master finite state machine FSM executed by the master PMIC. A slave power management integrated circuit PMIC executes a slave finite state machine FSM and supplies power to another subsystem based on the current state of the master FSM. For synchronizing the operation of both PMIC, the master PMIC transmits, to the slave PMIC, synchronization information indicative of at least one of an input signal of the master FSM, a state of the master FSM, a state transition of the master FSM, and an output signal generated by the master FSM. A distributed power management method is presented which is carried out by a master PMIC and a slave PMIC.