The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2019

Filed:

Jan. 31, 2017
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventor:

Clemens Kain, Kammern, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/07 (2006.01); G01R 15/14 (2006.01); G01R 15/16 (2006.01); G01R 19/00 (2006.01); H03F 3/45 (2006.01); H03K 17/687 (2006.01); H02M 3/156 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/07 (2013.01); G01R 15/146 (2013.01); G01R 15/16 (2013.01); G01R 19/0092 (2013.01); H03F 3/45264 (2013.01); H03K 17/6872 (2013.01); H02M 3/156 (2013.01); H02M 2001/0009 (2013.01); H03F 2203/45544 (2013.01); H03K 2217/0027 (2013.01);
Abstract

A switched-capacitor circuit is described herein. In accordance with one exemplary embodiment the switched-capacitor circuit includes a first input node and a second input node and an input switch unit. The input switch is connected to the first input node and the second input node and has a first output node and a second output node. A first capacitor is coupled to the first output node of the input switch unit, and a second capacitor is coupled to the second output node of the input switch unit. The input switch unit includes a plurality of switches configured to con-nect and disconnect one of the first and second input nodes and one of the first capacitor and the second capacitor. The input switch unit further includes a first charge pump coupled to the first input node and a second charge pump coupled to the second input node. The first charge pump is configured to generate, based on a clock signal, switching signals for a switch of the plurality of switches, and the second charge pump is configured to generate, based on the clock signal, switching signals for a further switch of the plurality of switches.


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