The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2019

Filed:

Dec. 28, 2016
Applicant:

Secure-ic Sas, Cesson-Sévigné, FR;

Inventors:

Sylvain Guilley, Paris, FR;

Thibault Porteboeuf, Paris, FR;

Jean-Luc Danger, Antony, FR;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 31/0216 (2014.01); H01L 27/32 (2006.01); G09C 1/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/576 (2013.01); G09C 1/00 (2013.01); H01L 23/5225 (2013.01); H01L 23/573 (2013.01); H01L 27/3272 (2013.01); H01L 31/02164 (2013.01); H04L 2209/12 (2013.01);
Abstract

Embodiments of the invention provide a system for protecting an integrated circuit (IC) device from attacks, the IC device () comprising a substrate () having a front surface () and a back surface (), the IC device further comprising a front side part () arranged on the front surface of the substrate () and stacked layers, at least one of said layers comprising a data layer comprising wire carrying data, the front side part having a front surface (). The system comprises an internal shield () arranged in a layer located below said data layer and a verification circuit configured to check the integrity of at least one portion of the internal shield.


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