The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2019

Filed:

Jan. 29, 2015
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd., Singapore, SG;

Inventor:

Nathan Perkins, Windsor, CO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 23/14 (2006.01); H01L 23/15 (2006.01); H01L 23/36 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 23/145 (2013.01); H01L 23/15 (2013.01); H01L 23/36 (2013.01); H01L 23/3677 (2013.01); H01L 23/481 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/14 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/4911 (2013.01); H01L 2224/73257 (2013.01); H01L 2924/00014 (2013.01);
Abstract

An apparatus includes a multilayer package substrate having a plurality of layers. The apparatus also includes a first heat sink disposed over the package substrate. The first heat sink is configured to connect to a semiconductor device and to provide an electrical ground for the semiconductor device. The apparatus includes a second heat sink disposed in the package substrate. The first heat sink overlaps substantially all of the first electrically conductive layer and no dielectric material exists in the multilayer package substrate in a region of contact of the first heat sink and the first electrically conductive layer.


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