The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2019

Filed:

Sep. 05, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Hee-Chang Cho, Seoul, KR;

Jae-Phil Kong, Seoul, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G11C 5/14 (2006.01); G06F 13/38 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/385 (2013.01); G06F 1/26 (2013.01); G06F 13/4022 (2013.01); G11C 5/14 (2013.01); G06F 2213/0042 (2013.01);
Abstract

A memory system includes a storage device and a host device. The storage device includes a memory device and a device controller. The device controller is configured to store device information. The device information includes a level of a power supply voltage required for the memory device. The host device includes a host controller and a power management integrated circuit (PMIC). The host device is configured to send a query command to receive the device information from the device controller during a power setting period. The PMIC is configured to supply a first level of power supply voltage to the memory device during the power setting period and, after the power setting period, selectively supply one of the first level of power supply voltage and a second level of power supply voltage to the memory device. The first level of power supply voltage is lower than the second level of power supply voltage.


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