The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2019

Filed:

Jul. 25, 2008
Applicants:

Tomonori Kataoka, Oonojyo, JP;

Hideshi Nishida, Nishinomiya, JP;

Kouzou Kimura, Toyonaka, JP;

Nobuo Higaki, Kobe, JP;

Tokuzo Kiyohara, Osaka, JP;

Inventors:

Tomonori Kataoka, Oonojyo, JP;

Hideshi Nishida, Nishinomiya, JP;

Kouzou Kimura, Toyonaka, JP;

Nobuo Higaki, Kobe, JP;

Tokuzo Kiyohara, Osaka, JP;

Assignee:

SOCIONEXT INC., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); H04N 19/86 (2014.01); H04N 19/61 (2014.01); H04N 19/44 (2014.01); H04N 19/42 (2014.01); H04N 19/436 (2014.01); H04N 19/523 (2014.01);
U.S. Cl.
CPC ...
H04N 19/86 (2014.11); G06F 9/3885 (2013.01); H04N 19/42 (2014.11); H04N 19/436 (2014.11); H04N 19/44 (2014.11); H04N 19/523 (2014.11); H04N 19/61 (2014.11);
Abstract

A signal-processing apparatus includes an instruction-parallel processor, a first data-parallel processor, a second data-parallel processor, and a motion detection unit, a de-blocking filtering unit and a variable-length coding/decoding unit which are dedicated hardware. With this structure, during signal processing of an image compression and decompression algorithm needing a large amount of processing, the load is distributed between software and hardware, so that the signal-processing apparatus can realize high processing capability and flexibility.


Find Patent Forward Citations

Kataoka, Tomonori. (2019). Signal-processing apparatus including a second processor that, after receiving an instruction from a first processor, independantly controls a second data processing unit without further instrcuction from the first processor (U.S. Patent No. 10230991). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10230991

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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