The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2019

Filed:

May. 22, 2015
Applicant:

Nissan Motor Co., Ltd., Yokohama-shi, Kanagawa, JP;

Inventors:

Yusuke Zushi, Kanagawa, JP;

Tatsuhiro Suzuki, Kanagawa, JP;

Keiichiro Numakura, Kanagawa, JP;

Taku Shimomura, Kanagawa, JP;

Tetsuya Hayashi, Kanagawa, JP;

Assignee:

NISSAN MOTOR CO., LTD., Yokohama-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 5/458 (2006.01); H02M 7/217 (2006.01); H02M 7/48 (2007.01); H03K 17/567 (2006.01); H02M 1/088 (2006.01); H02M 7/537 (2006.01); H03K 17/082 (2006.01); H03K 17/12 (2006.01); H03K 17/16 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/08 (2013.01); H02M 1/088 (2013.01); H02M 5/4585 (2013.01); H02M 7/217 (2013.01); H02M 7/48 (2013.01); H02M 7/537 (2013.01); H03K 17/0822 (2013.01); H03K 17/122 (2013.01); H03K 17/165 (2013.01); H03K 17/567 (2013.01); H02M 2001/0006 (2013.01); H03K 2217/0081 (2013.01);
Abstract

A power conversion device includes a gate voltage adjustment unit (a detection circuit) which acts on a drive signal from a gate drive circuitthat sends a drive signal to the respective gates of a plurality of semiconductor elements Qto Qprovided in parallel, and which adjusts the gate voltages of the semiconductor elements. The gate voltage adjustment unit superimposes an induction voltage generated on the basis of a difference between a magnetic flux due to a current flowing through one of the plurality of semiconductor elements and a magnetic flux due to a current flowing through each of the other semiconductor elements, onto a gate voltage sent to at least one gate of the plurality of semiconductor elements.


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