Array substrate and fabrication method thereof

Abstract

An array substrate and a fabrication method thereof are provided. The array substrate comprises a plurality of wiring regions (S-S') disposed in a non-display region, a plurality of signal lines () is provided in the wiring regions (S-S′), at least part of the signal lines () within each of the wiring regions (S-S′) are respectively formed by connecting conducting wires () located in different layers in series; and any two of the signal lines () within a same wiring region (S-S′) have a resistance difference within a threshold range. The same signal line () is disposed in different layers, so that the signal line () is bent in a plane perpendicular to the array substrate, which achieves of the extension of a length of the signal line (), and thus increases the length and resistance of the signal line (), the resistance of which needs to be increased. At the same time, the width taken by the signal line () is not increased, so that the signal line () has a greater density in the wiring region (S-S′), which achieves the reduction in the number of drivers and the fabrication costs, and meanwhile avoids a problem that it is not conducive to realize a narrow frame due to a large area of the non-display region, resulted from a large area taken by a single signal line ().