The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2019
Filed:
May. 25, 2018
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Jun Hee Yoo, Yongin-si, KR;
Jae Geun Yun, Hwaseong-si, KR;
Bub Chul Jeong, Yongin-si, KR;
Dong Soo Kang, Hwaseong-si, KR;
Kyeo Rae Lee, Anyang-si, KR;
Seong Min Jo, Seoul, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;
Abstract
A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.