The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2019

Filed:

Apr. 27, 2018
Applicant:

Realtek Semiconductor Corp., Hsinchu, TW;

Inventors:

Chia-Liang (Leon) Lin, Fremont, CA (US);

Fei Song, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/023 (2006.01); H03K 3/356 (2006.01); H03K 3/011 (2006.01);
U.S. Cl.
CPC ...
H03K 3/023 (2013.01); H03K 3/011 (2013.01); H03K 3/356104 (2013.01);
Abstract

A method comprises: receiving a differential input signal; converting the differential input signal into a first transmitted current and a second transmitted current using a common-source differential pair biased by a bias current; launching the first transmitted current and the second transmitted current onto a first port of a differential transmission line; receiving a first received current and a second received current from a second port of the differential transmission line; buffering the first received current and the second received current into a first output current and a second output current, respectively, using a current buffer, wherein the current buffer comprises: a common-gate amplifier pair, a first cross-coupling network configured to provide a negative feedback on the input side of the current buffer to reduce an input impedance of the current buffer, and a second cross-coupling network configured to provide a positive feedback on the output side of the current buffer to boost an output impedance of the current buffer; and terminating the first output current and the second output current with a load to establish a differential output signal.


Find Patent Forward Citations

Loading…