The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2019

Filed:

Jul. 13, 2016
Applicants:

Nr Electric Co., Ltd, Jiangsu, CN;

Nr Engineering Co., Ltd, Jiangsu, CN;

Inventors:

Yeyuan Xie, Jiangsu, CN;

Dongming Cao, Jiangsu, CN;

Tiangui Jiang, Jiangsu, CN;

Minglian Zhu, Jiangsu, CN;

Guanxian Yin, Jiangsu, CN;

Assignees:

NR ELECTRIC CO., LTD, Jiangsu, CN;

NR ENGINEERING CO., LTD., Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/5387 (2007.01); H02M 7/219 (2006.01); H02J 7/00 (2006.01); H02M 3/00 (2006.01); H02M 3/139 (2006.01); H01M 10/42 (2006.01); G06F 13/00 (2006.01); H02M 3/137 (2006.01); H02M 7/00 (2006.01); H02M 1/32 (2007.01); H02M 7/483 (2007.01);
U.S. Cl.
CPC ...
H02M 7/5387 (2013.01); G06F 13/00 (2013.01); H01M 10/4257 (2013.01); H02J 7/0021 (2013.01); H02M 1/32 (2013.01); H02M 3/00 (2013.01); H02M 3/137 (2013.01); H02M 3/139 (2013.01); H02M 7/00 (2013.01); H02M 7/219 (2013.01); H02M 2001/325 (2013.01); H02M 2001/327 (2013.01); H02M 2007/4835 (2013.01);
Abstract

Disclosed are a modulation method of a modular multilevel converter and a fault isolation method of a submodule unit. The modulation method comprises a first mode and a second mode, and the first mode and the second mode operate cyclically. In the first mode, a first power semiconductor switch and a second power semiconductor switch are turned on alternately, while a third power semiconductor switch is turned off normally and a fourth power semiconductor switch is turned on normally. In the second mode, the third power semiconductor switch and the fourth power semiconductor switch are turned on alternately, while the first power semiconductor switch is turned on normally and the second power semiconductor switch is turned off normally. The method enables junction temperatures of the power semiconductor switches used to be equalized, increases an operation safety margin of the converter, effectively increase the capacity of the converter without increasing engineering costs, and achieve better performance in both economic efficiency and technicality.


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