The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2019

Filed:

Mar. 14, 2018
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Yuichiro Ishii, Tokyo, JP;

Atsushi Miyanishi, Tokyo, JP;

Kazumasa Yanagisawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 11/417 (2006.01); H03K 19/00 (2006.01); H03K 17/687 (2006.01); H01L 23/528 (2006.01); H01L 27/11 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
G11C 11/417 (2013.01); H01L 23/5286 (2013.01); H01L 27/1104 (2013.01); H01L 27/1116 (2013.01); H01L 29/1095 (2013.01); H03K 17/6871 (2013.01); H03K 19/0016 (2013.01);
Abstract

A semiconductor device includes: a first power source line for supplying a first voltage; a second power source line for supplying a second voltage; a memory circuit coupled with the first and second power source lines; a first switch which electrically coupling the first power source line with the second power source line and electrically decoupling the first power source line from the second power source line, in response to a control signal; a second switch which electrically coupling the first power source line with the second power source line and electrically decoupling the first power source line from the second power source line, in response to the control signal, wherein a memory circuit includes a memory cell array and a peripheral circuit, wherein a memory cell array includes a plurality of memory cells, the memory cells coupled with the second power source line.


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