The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2019

Filed:

May. 18, 2016
Applicant:

Panasonic Liquid Crystal Display Co., Ltd., Hyogo, JP;

Inventor:

Masafumi Hirata, Hyogo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/00 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/006 (2013.01); G09G 2300/02 (2013.01); G09G 2300/0413 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0264 (2013.01); G09G 2310/0281 (2013.01); G09G 2330/12 (2013.01);
Abstract

Provided is a display panel, including: a display region having an anomaly shape; a plurality of first test transistors; a plurality of second test transistors; and test control signal supply wiring through which a control signal for turning on or off the first and second test transistors is to be supplied, in which first test transistors connected to gate lines crossing an anomaly part of the anomaly shape and second test transistors connected to data lines crossing the anomaly part are arranged in other patterns than a straight line, and in which the test control signal supply wiring includes first test control signal supply wiring, which is connected to control electrodes of the plurality of first test transistors, and second test control signal supply wiring, which is branched out from the first test control signal supply wiring and is connected to control electrodes of the plurality of second test transistors.


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