The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2019
Filed:
May. 31, 2017
Hewlett Packard Enterprise Development Lp, Houston, TX (US);
Srivani Kor Koriginja Ramaswamy, Houston, TX (US);
Yiling Zhang, Houston, TX (US);
Hoang Thanh Nguyen, Houston, TX (US);
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Abstract
Examples provided herein relate to hot plugging PCIe cards. For example, a field programmable gate array ('FPGA') communicably coupled to a PCIe bus may detect a new PCIe card physically connected to the PCIe bus. The FPGA may access configuration information stored by the FPGA that is associated with the PCIe bus. The FPGA may determine, based on the accessed configuration information, whether to facilitate connection of the new PCIe card to the PCIe bus. Responsive to determining that connection of the new PCIe card to the PCIe bus should be facilitated, the new PCIe card may be trained to communicate with the PCIe bus and an upstream device communicably coupled to the PCIe bus.