The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2019

Filed:

Dec. 30, 2016
Applicant:

Xockets, Inc., San Jose, CA (US);

Inventor:

Parin Bhadrik Dalal, Milpitas, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); H04L 12/24 (2006.01); H04L 12/931 (2013.01); G06F 13/42 (2006.01); H04L 29/06 (2006.01); G06F 17/30 (2006.01); G06F 21/55 (2013.01); H04L 29/08 (2006.01); G06F 12/1018 (2016.01); G06F 12/1081 (2016.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 13/16 (2013.01); G06F 13/1652 (2013.01); G06F 13/4282 (2013.01); H04L 41/12 (2013.01); H04L 49/70 (2013.01); H04L 63/0272 (2013.01); H04L 63/0281 (2013.01); H04L 63/0428 (2013.01); H04L 63/14 (2013.01); H04L 63/168 (2013.01); G06F 9/5066 (2013.01); G06F 12/1018 (2013.01); G06F 12/1081 (2013.01); G06F 17/3061 (2013.01); G06F 17/30424 (2013.01); G06F 21/55 (2013.01); H04L 63/0227 (2013.01); H04L 67/10 (2013.01); Y02D 10/13 (2018.01); Y02D 10/14 (2018.01); Y02D 10/151 (2018.01); Y02D 10/22 (2018.01); Y02D 10/36 (2018.01);
Abstract

A system can include a plurality of first server modules interconnected to one another via a communication network, each first server module including a first switch, at least one main processor, and at least one computation module coupled to the main processor by a bus, each computation module including a second switch, and a plurality of computation elements; wherein the second switches of the first server modules form a switching plane for the ingress and egress of network packets independent of any main processors of the first server modules.


Find Patent Forward Citations

Dalal, Parin. (2019). Offloading of computation for servers using switching plane formed by modules inserted within such servers (U.S. Patent No. 10223297). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10223297

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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