The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2019

Filed:

Jul. 15, 2016
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;

Inventor:

Yong Deng, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/4763 (2006.01); H01L 21/467 (2006.01); H01L 29/45 (2006.01); H01L 29/24 (2006.01); G02F 1/1368 (2006.01); H01L 21/027 (2006.01); H01L 21/77 (2017.01); G02F 1/1343 (2006.01); H01L 21/02 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); G02F 1/1362 (2013.01); G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); H01L 21/027 (2013.01); H01L 21/02565 (2013.01); H01L 21/467 (2013.01); H01L 21/47635 (2013.01); H01L 21/77 (2013.01); H01L 27/12 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 29/24 (2013.01); H01L 29/42384 (2013.01); H01L 29/45 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78618 (2013.01); G02F 1/134363 (2013.01); G02F 2001/134372 (2013.01); G02F 2001/136231 (2013.01); G02F 2201/123 (2013.01); G02F 2202/10 (2013.01);
Abstract

The present invention provides an array substrate and a manufacturing method thereof. The method includes covering a reduction metal layer on an oxide semiconductor layer film and simultaneously forming a source pattern, a drain pattern, a pixel electrode pattern, and an oxide semiconductor layer through patterning the oxide semiconductor layer film and the reduction metal layer with one mask-based operation, followed by reducing the source pattern, the drain pattern, and the pixel electrode pattern to conductors through laser annealing to simultaneously form a source electrode, a drain electrode, and a pixel electrode. The entire manufacturing process needs, at most, only three rounds of mask-based operations so that, compared to the prior art, the number of mask-based operations required can be effectively reduced, the manufacturing operation can be simplified, and the performance of a TFT can be improved and an aperture ratio of the array substrate can be increased.


Find Patent Forward Citations

Deng, Yong. (2019). Array substrate and manufacturing method thereof (U.S. Patent No. 10217778). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10217778

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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