The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2019
Filed:
Oct. 13, 2017
Denselight Semiconductors Pte. Ltd., Singapore, SG;
Yee Loy Lam, Singapore, SG;
DenseLight Semiconductors Pte. Ltd., Singapore, SG;
Abstract
A wafer-level semiconductor die attachment method includes placing a semiconductor die of a plurality of semiconductor dies at an initial placement position to overlap a sub-mount pad on a sub-mount of a pre-singulated wafer. A die pad of the semiconductor die comes in contact with a solder layer deposited over the sub-mount pad. The semiconductor die and the sub-mount include a plurality of die and sub-mount mating features, respectively. The solder layer is heated locally to temporarily hold the semiconductor die at the initial placement position. The pre-singulated wafer is reflowed, when each semiconductor die is temporarily held at the corresponding initial placement position. During reflow, each semiconductor die slides from the initial placement position and a contact is established between the corresponding plurality of die and sub-mount mating features. Thereby, each semiconductor die is permanently attached to the corresponding sub-mount.