The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2019

Filed:

Aug. 22, 2018
Applicant:

Avago Technologies International Sales Pte. Limited, Singapore, SG;

Inventor:

Andrew Blanksby, Lake Oswego, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); H03K 19/21 (2006.01); H03M 13/29 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/10 (2013.01); G06F 11/0772 (2013.01); H03K 19/21 (2013.01); H03M 13/2909 (2013.01);
Abstract

Various aspects of systems for generating parity bits for encoding based on a portion of a generator matrix are disclosed. In one aspect, a generator matrix includes a sub-block including a first set of elements circularly shifted from an identity matrix by a first amount, and a second set of elements circularly shifted from the identity matrix by a second amount. Bit permutation circuitry generates first bits according to input bits and the first amount. Each of the first bits is provided as input to a corresponding XOR device of XOR devices. Each of a set of storage registers stores an output of the corresponding XOR device. The bit permutation circuitry generates second bits according to the input bits and the second amount. The XOR devices perform bit-wise XOR operations on the stored outputs and the generated second bits, to provide a portion of the parity bits.


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