Shift and divide operations using floating-point arithmetic

Abstract

An aspect includes fetching a computer instruction, the fetching by an instruction fetch unit. It is determined that the instruction is a decimal divide instruction that specifies a decimal divisor and a decimal dividend. The decimal divisor is converted into a floating-point divisor and the decimal dividend is converted into a floating-point dividend. A floating-point division of the floating-point dividend by the floating-point divisor is performed by an instruction execution unit. It is determined that the floating-point division resulted in a quotient overflow. A reduced size floating-point dividend is generated based on the quotient overflow, the floating-point divisor, and the floating-point dividend. The floating point division of the reduced size floating-point dividend by the floating-point divisor is performed by the instruction execution unit, and a specified number of rightmost bits of the result is output as the quotient.